We use cookies. Find out more about it here. By continuing to browse this site you are agreeing to our use of cookies.
#alert
Back to search results
New

VLSI Design and Verification Engineer Intern - Summer 2026

Seagate Technology
paid holidays, sick time
United States, Colorado, Longmont
389 Disc Dr (Show on map)
Oct 21, 2025
About our group:

We're looking for VLSI Design and Verification Engineers who want to help us create electronics that will change how data is stored and accessed. If you are looking to be on an innovative team that will both challenge and support you, this might be the Engineering role for you. As a VLSI Design and Verification Engineer you will be working with system architects, layout and circuit designers and testing team to implement, verify and validate digital circuitry from high level concept to actual silicon and support the product into mass production.



Our team is made up of multi-discipline engineers designing IP for integration into ASICs and FPGAs for a variety of enterprise operations. Our IP directly supports Seagate's continual drive for new storage solutions that provide solid data integrity and increased performance.

About the role - you will:

  • Work with a wide range of people and skills as we develop and then test the latest Enterprise storage controller SoCs. This will include a number of tasks ranging from implementing the design using SystemVerilog hardware design language, writing verification (Score Boards, Checkers, etc.) using UVM, applying stimulus and then debugging the functionality.
  • Use various EDA tools like VCS simulator, Synopsys Design Compiler, Vivado and Quartus to simulate and implement circuitry as part of our next generation SoCs.
  • Write scripts using various languages like Python to automate processes used for our projects.
  • Interact with various other teams as we continue to define features and their usage through the project development schedule.

About you:

  • An understanding of advanced verification theories and/or logic design concepts with some experience running hardware design language simulators is needed.

Your experience includes:

  • Experience with Verilog and/or SystemVerilog as well as Python, C++ and Object-Oriented Programming highly desired.
  • Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related degree and will be enrolled for academic courses in Fall 2026.

Location:

Our Longmont product-design campus is nestled against the foothills with exceptional views of the Rocky Mountains. Here at work, you can grab breakfast and lunch in the on-site cafeteria or get an afternoon espresso, prepared by a professional barista. Our 1,500+ employees enjoy an active on-site experience from sporting activities (get in a few laps at lunch on our 1-mile walking path around campus, play ping-pong or volleyball, or stop in our 24- hour fitness center for a group or individual workout) to community service and many employee resource groups.

The estimated base wage range for this position is $27.00-35.00/hr. The individual base wage is based on work location and additional factors, including job-related skills, experience, and relevant education or training. Seagate offers comprehensive benefits to its eligible Interns, including, but not limited to, medical, dental, vision, and participation in the employee stock purchase plan. Seagate also offers Interns 12 paid holidays and a minimum of 48 hours of paid sick leave. The benefits for this position are based on a 24 to 40-hour-per-week schedule for a full calendar year and may differ depending on work location and tenure with the Company.



#internship



Location: Longmont, United States

Travel: None

Applied = 0

(web-c549ffc9f-j8rxw)