Analog Layout Senior Staff Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

Working with global teams across Argentina, Singapore, the U.S., and Europe, you will run simulations and verifications using Cadence Virtuoso, collaborating closely with the designer to refine and debug iteratively until the design meets specifications. Project durations vary from a few months to a year and a half with flexibility to switch based on changing priorities is appreciated.

Regular meetings with your paired designer ensure collaborative information sharing, integral to Marvell's commitment to partnership and teamwork. As a key contributor, you play a crucial role in the project lifecycle, participating in routine meetings as a technical mentor, layout team, and the broader project team. These interactions include updates on progress and may involve presenting specific issues or solutions encountered during the development of cutting-edge technologies. The dynamic nature of our work ensures continuous learning and knowledge-sharing among colleagues.

What We're Looking For

To be successful in this role, you must:
- Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
- Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
- Track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes
- Have ownership through the full development cycle: floorplan, layout, verification, delivery, and support
- Assume more responsibility and ownership of tasks, from cells to functional blocks, to higher-level macros, to full interfaces or chips
- Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.